Self-assembled monolayer (SAM) treatment of gate dielectrics plays a key role in the improvement of the electrical performance of organic thin-film transistors (TFTs) by reducing the interface traps. However, it is rarely explored in inorganic TFTs owing to possible irreversible damage to very thin SAMs during the sputtering and high-temperature annealing processes that are often used to deposit inorganic materials. Here, the feasibility of performance enhancement of inorganic p-type Zn-doped CuI TFTs is explored by a SAM treatment using 3-aminopropyltriethoxysilane (APTES) on the gate dielectric. Our result shows that the TFT performance is significantly enhanced with a 50% reduction in the interface trap density, a 326% increase in the hole mobility from 0.38 to 1.24 cm 2 V -1 s -1 and a 5-fold increase in the current on/off ratio from 2.6 × 10 6 to 1.1 × 10 7 . In addition, the bias stress stability of the TFTs after the treatment is dramatically enhanced by a factor of 10 due to the improved interface properties. The threshold voltage shift is reduced from +19.6 to +1.8 V after 3600 s positive bias stress. The simple yet effective interface treatment approach may have great potential in the fabrication of high-performance inorganic p-type electronic devices.
Sandwich structure and encapsulation techniques are highly effective methods for reducing leakage current density ( J ) in polymer nanocomposites. However, most studies focus on electric field homogenization, and the low-field discharge energy density ( U dis ) of current polymer nanocomposites is still limited to 5 J/cm 3 at operating conditions of 200–300 kV/mm for film capacitors in electric vehicles. To address these issues based on the multi-interface trap energy levels, we hereby design a poly(vinylidene fluoride) (PVDF) composite filled with core-shell nanoparticles of BaTiO 3 @polydopamine (BT@PDA) and sandwiched by poly(methyl methacrylate) (PMMA) layers for high low-field U dis . The coordination of deep electron traps at the PMMA/PVDF interlayer interface along with deep hole and electron traps at the PVDF/PDA interfaces can trap charges and hinder charge transport. This effectively suppresses J and significantly increases the low-field U dis , as demonstrated by interfacial energy band analysis and phase field simulations. Consequently, a high low-field U dis of 6.65 J/cm 3 at 310 kV/mm was achieved on this PMMA-BDP-PMMA nanocomposite, along with a low dielectric loss of 0.037 and a low J of 3.88 × 10 −7 A/cm 2 at 25 kV/mm and a high energy efficiency of 66 %. It represents an effective approach to improving the energy storage performance of polymer dielectrics at low fields.
It is well known that the interfacial region between the polymeric matrix and nanofiller plays a very important role in tailoring the electrical insulation properties of nanocomposite. In this study two type of polyhedral-oligomeric-silsesquioxane (POSS) are doped into epoxy (EP) to investigate the tailoring of interfacial traps that can limit the mobility of charge carriers and enhance the breakdown strength . Incorporating acryloxypropyl POSS (AP-POSS) to EP matrix improves the breakdown strength than that of pristine EP and octaphenyl POSS (OP-POSS). The molecular simulation and experiments identifies that the compatibility between EP/POSS and trap depth is dependent on the interfacial interaction energy and crosslinking density. The side groups of AP-POSS has large number of localized energy states and higher electron affinity ( E A ) that can tailor deeper traps and restrain the mobility of electrons in EP/AP-POSS. The interfacial compatibility of POSS side groups with EP tune the interfacial traps and dielectric characteristics.