Wanying Du,Xionghui Jia,Zhixuan Cheng,Wanjing Xu,Yanping Li,Lun Dai
Two-dimensional (2D) semi-conductive transition metal dichalcogenides (TMDCs) have shown advantages for logic application. Complementary metal-oxide-semiconductor (CMOS) inverter is an important component in integrated circuits in view of low power consumption. So far, the performance of the reported TMDCs-based CMOS inverters is not satisfactory. Besides, most of the inverters were made of mechanically exfoliated materials, which hinders their reproducible production and large-scale integration in practical application. In this study, we demonstrate a practical approach to fabricate CMOS inverter arrays using large-area p -MoTe 2 and n -MoS 2 , which are grown via chemical vapor deposition method. The current characteristics of the channel materials are balanced by atomic layer depositing Al 2 O 3 . Complete logic swing and clear dynamic switching behavior are observed in the inverters. Especially, ultra-low power consumption of ∼0.37 nW is achieved. Our work paves the way for the application of 2D TMDCs materials in large-scale low-power-consumption logic circuits.
Two innovative research studies are reported in this paper. One is the sorting of semiconducting carbon nanotubes and ink formulation by a novel semiconductor copolymer and second is the development of CMOS inverters using not the p-type and n-type transistors but a printed p-type transistor and a printed ambipolar transistor. A new semiconducting copolymer (named P-DPPb5T) was designed and synthesized with a special nonlinear structure and more condensed conjugation surfaces, which can separate large diameter semiconducting single-walled carbon nanotubes (sc-SWCNTs) from arc discharge SWCNTs according to their chiralities with high selectivity. With the sorted sc-SWCNTs ink, thin film transistors (TFTs) have been fabricated by aerosol jet printing. The TFTs displayed good uniformity, low operating voltage (±2 V) and subthreshold swing (SS) (122–161 mV dec−1), high effective mobility (up to 17.6–37.7 cm2 V−1 s−1) and high on/off ratio (104–107). With the printed TFTs, a CMOS inverter was constructed, which is based on the p-type TFT and ambipolar TFT instead of the conventional p-type and n-type TFTs. Compared with other recently reported inverters fabricated by printing, the printed CMOS inverters demonstrated a better noise margin (74% 1/2 Vdd) and was hysteresis free. The inverter has a voltage gain of up to 16 at an applied voltage of only 1 V and low static power consumption.
Boxiang Gao,Weijun Wang,You Meng,Congcong Du,Yunchen Long,Yuxuan Zhang,He Shao,Zhengxun Lai,Wei Wang,Pengshan Xie,SenPo Yip,Xiaoyan Zhong,Johnny C. Ho
As demand for higher integration density and smaller devices grows, silicon-based complementary metal-oxide-semiconductor (CMOS) devices will soon reach their ultimate limits. 2D transition metal dichalcogenides (TMDs) semiconductors, known for excellent electrical performance and stable atomic structure, are seen as promising materials for future integrated circuits. However, controlled and reliable doping of 2D TMDs, a key step for creating homogeneous CMOS logic components, remains a challenge. In this study, a continuous electrical polarity modulation of monolayer WS 2 from intrinsic n-type to ambipolar, then to p-type, and ultimately to a quasi-metallic state is achieved simply by introducing controllable amounts of vanadium (V) atoms into the WS 2 lattice as p-type dopants during chemical vapor deposition (CVD). The achievement of purely p-type field-effect transistors (FETs) is particularly noteworthy based on the 4.7 at% V-doped monolayer WS 2 , demonstrating a remarkable on/off current ratio of 10 5 . Expanding on this triumph, the first initial prototype of ultrathin homogeneous CMOS inverters based on monolayer WS 2 is being constructed. These outcomes validate the feasibility of constructing homogeneous CMOS devices through the atomic doping process of 2D materials, marking a significant milestone for the future development of integrated circuits.
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