摘要
It is widely known that the challenge of making good electrical contact at the back electrode interface will always follow us for high-efficient kesterite-type CZTSSe thin-film solar cells. Aiming at clarifying the correlation of device performance on the micro-structure of back interface, we come up with a new fresh design that introducing in-situ anodized MoO 3 porous arrays with regulated structural parameters acts as the back interfacial contact. Regards the such array-structures of interpenetrated CZTSSe and MoO 3 , the study reveals that the overall device performance is closely related to the micro-structure of the MoO 3 interface layer , and the optimized device efficiency can be improved to 9.00% from 6.31% (Ref. Mo-based cells), having a 32% increased J SC together with a 64% increase in FF. The performance improvement mechanism is analyzed in details. The interesting preliminary finding would indicate that the new strategy is very effective to form reliable electrical contact at the back interface for high-efficient CZTSSe solar cells.
危险品化学品经营许可证(带存储)